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3مورد إلكتروني
مصطلحات الفهرس: confocal microscopy, surface engineering, light-optical roughness analysis, nanometre resolution, text
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4مورد إلكترونيAn Elitist Non-Dominated Multi-Objective Genetic Algorithm Based Temperature Aware Circuit Synthesis
المصدر: IJIMAI, ISSN 1989-1660, Vol. 6, Nº. 4, 2020, pags. 26-38
مصطلحات الفهرس: At sub-nanometre technology, temperature is one of the important design parameters to be taken care of during the target implementation for the circuit for its long term and reliable operation, High device package density leads to high power density that generates high temperatures, The temperature of a chip is directly proportional to the power density of the chip, So, the power density of a chip can be minimized to reduce the possibility of the high temperature generation, Temperature minimization approaches are generally addressed at the physical design level but it incurs high cooling cost, To reduce the cooling cost, the temperature minimization approaches can be addressed at the logic level, In this work, the Non-Dominated Sorting Genetic Algorithm-II (NSGA-II) based multi-objective heuristic approach is proposed to select the efficient input variable polarity of Mixed Polarity Reed-Muller (MPRM) expansion for simultaneous optimization of area, power, and temperature, A Pareto optimal solution set is obtained from the vast solution set of 3n (‘n’ is the number of input variables) different polarities of MPRM, Tabular technique is used for input polarity conversion from Sum-of-Product (SOP) form to MPRM form, Finally, using CADENCE and HotSpot tool absolute temperature, silicon area and power consumption of the synthesized circuits are calculated and are reported, The proposed algorithm saves around 76, 20% silicon area, 29, 09% power dissipation and reduces 17, 06% peak temperature in comparison with the reported values in the literature, text (article)
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5مورد إلكترونيAn Elitist Non-Dominated Multi-Objective Genetic Algorithm Based Temperature Aware Circuit Synthesis
المصدر: IJIMAI, ISSN 1989-1660, Vol. 6, Nº. 4, 2020, pags. 26-38
مصطلحات الفهرس: At sub-nanometre technology, temperature is one of the important design parameters to be taken care of during the target implementation for the circuit for its long term and reliable operation, High device package density leads to high power density that generates high temperatures, The temperature of a chip is directly proportional to the power density of the chip, So, the power density of a chip can be minimized to reduce the possibility of the high temperature generation, Temperature minimization approaches are generally addressed at the physical design level but it incurs high cooling cost, To reduce the cooling cost, the temperature minimization approaches can be addressed at the logic level, In this work, the Non-Dominated Sorting Genetic Algorithm-II (NSGA-II) based multi-objective heuristic approach is proposed to select the efficient input variable polarity of Mixed Polarity Reed-Muller (MPRM) expansion for simultaneous optimization of area, power, and temperature, A Pareto optimal solution set is obtained from the vast solution set of 3n (‘n’ is the number of input variables) different polarities of MPRM, Tabular technique is used for input polarity conversion from Sum-of-Product (SOP) form to MPRM form, Finally, using CADENCE and HotSpot tool absolute temperature, silicon area and power consumption of the synthesized circuits are calculated and are reported, The proposed algorithm saves around 76, 20% silicon area, 29, 09% power dissipation and reduces 17, 06% peak temperature in comparison with the reported values in the literature, text (article)
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6مورد إلكتروني
عناروين إضافية: Key Techniques on Preparing High Aspect Ratio Micro and Nano Structures
المصدر: Jian , Z , Lianhe , D , Xiaoli , Z , Changqing , X , Baoqin , C & Shi , P 2016 , ' Key Techniques on Preparing High Aspect Ratio Micro and Nano Structures ' , Wei-Na Dianzi Jishu , vol. 53 , no. 10 , pp. 685-690 .
مصطلحات الفهرس: Nanolithography, Other topics in materials science, Structure of solid clusters, nanoparticles, nanotubes and nanostructured materials, Fluid surface energy (surface tension, interface tension, angle of contact, etc.), Nanometre-scale semiconductor fabrication technology, General fabrication techniques, Lithography (semiconductor technology), adhesion, drying, electron beam lithography, microfabrication, nanofabrication, nanolithography, nanostructured materials, surface tension, CO2 supercritical drying, gas-liquid interfacial capillary surface tension, resist structure, graphic contrast, line width, electron beam exposure dose, developing temperature, developing time, developer, high aspect ratio nanostructures, high aspect ratio microstructures, article
URL:
https://orbit.dtu.dk/en/publications/26d21639-d7f9-4edb-b1f1-8ea9efc7a37c https://doi.org/10.13250/j.cnki.wndz.2016.10.008 https://backend.orbit.dtu.dk/ws/files/151471533/_.pdf -
7مورد إلكتروني
المصدر: Vibroengineering PROCEDIA, Vol. 3, 2014, p. 124-127.; 2345-0533; 2538-8479
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8مورد إلكتروني
المصدر: Vibroengineering PROCEDIA, Vol. 3, 2014, p. 124-127.; 2345-0533; 2538-8479
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9مورد إلكتروني
المصدر: Wissenschaftliche Zeitschrift der Technischen Universität Dresden 56(2007)1-2, S. 100 - 104
مصطلحات الفهرس: info:eu-repo/classification/ddc/000, ddc:000, Design, Nanometerskala, design, nanometre scale, doc-type:article, info:eu-repo/semantics/article, doc-type:Text
URL:
https://tud.qucosa.de/id/qucosa%3A23972 https://tud.qucosa.de/api/qucosa%3A23972/attachment/ATT-0/ -
10مورد إلكتروني
المصدر: Wissenschaftliche Zeitschrift der Technischen Universität Dresden 56(2007)1-2, S. 100 - 104
مصطلحات الفهرس: info:eu-repo/classification/ddc/000, ddc:000, Design, Nanometerskala, design, nanometre scale, doc-type:article, info:eu-repo/semantics/article, doc-type:Text