يعرض 1 - 10 نتائج من 57 نتيجة بحث عن '"Computer-aided engineering"', وقت الاستعلام: 1.52s تنقيح النتائج
  1. 1
    Comparison of data driven algorithms for SoH estimation of Lithium-ion batteries

    المؤلفون: Basia, Akash, Simeu-Abazi, Zineb, Gascard, E., Zwolinski, Peggy

    المساهمون: Gestion et Conduite des Systèmes de Production (G-SCOP_GCSP), Laboratoire des sciences pour la conception, l'optimisation et la production (G-SCOP), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Conception Produit Process (G-SCOP_CPP ), Investissements d'avenir program (ANR-15-IDEX-02) - Cross Disciplinary Program CIRCULAR, CIRCULAR, ANR-15-IDEX-0002,UGA,IDEX UGA(2015)

    المصدر: 5th International Conference on Control, Automation and Diagnosis (ICCAD’21), Grenoble, FRANCE
    5th International Conference on Control, Automation and Diagnosis (ICCAD’21), Grenoble, FRANCE, Nov 2021, Grenoble, France

    مصطلحات موضوعية: SVR, Circular economy, diagnosis, Neural Network, SoH, 0202 electrical engineering, electronic engineering, information engineering, lithium-ion battery, 02 engineering and technology, [INFO.INFO-IA]Computer Science [cs]/Computer Aided Engineering, 7. Clean energy, [SPI.AUTO]Engineering Sciences [physics]/Automatic, 020202 computer hardware & architecture

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e41bff518ac980dcf0b02cc0c40af691
    https://doi.org/10.1109/iccad52417.2021.9638757

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  2. 2
    Analog and Mixed-Signal IC Security Via Sizing Camouflaging

    المؤلفون: Marie-Minerve Louerat, Alhassan Sayed, Hassan Aboushady, Haralampos-G. Stratigopoulos, Julian Leonhard

    المساهمون: Stratigopoulos, Haralampos, Circuits Intégrés Numériques et Analogiques (CIAN), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)

    المصدر: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE, In press

    مصطلحات موضوعية: Computer science, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMilieux_LEGALASPECTSOFCOMPUTING, 02 engineering and technology, Integrated circuit, Hardware_PERFORMANCEANDRELIABILITY, law.invention, law, Obfuscation, 0202 electrical engineering, electronic engineering, information engineering, Hardware_INTEGRATEDCIRCUITS, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business.industry, Transistor, Mixed-signal integrated circuit, [INFO.INFO-IA]Computer Science [cs]/Computer Aided Engineering, Computer Graphics and Computer-Aided Design, [INFO.INFO-MO]Computer Science [cs]/Modeling and Simulation, Sizing, [INFO.INFO-IA] Computer Science [cs]/Computer Aided Engineering, [SPI.TRON] Engineering Sciences [physics]/Electronics, 020202 computer hardware & architecture, [SPI.TRON]Engineering Sciences [physics]/Electronics, [INFO.INFO-ES] Computer Science [cs]/Embedded Systems, Logic gate, Operational amplifier, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [INFO.INFO-MO] Computer Science [cs]/Modeling and Simulation, business, Software, Computer hardware

    وصف الملف: application/pdf

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3aa4278e0e6abb556fdc9be824d94223
    https://hal.archives-ouvertes.fr/hal-02904330

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  3. 3
    Back-to-Back Butterfly Network: an Adaptive Permutation Network for New Communication Standards

    المؤلفون: Hassan Harb, Cyrille Chavet

    المساهمون: Equipe Hardware ARchitectures and CAD tools (Lab-STICC_ARCAD), Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT), Lab-STICC_UBS_CACS_MOCS, École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS), FEDER / Région Bretagne, FlexDEC-5G, Institut Mines-Télécom [Paris] (IMT)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-Institut Mines-Télécom [Paris] (IMT)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)

    المصدر: Journal of Signal Processing Systems
    Journal of Signal Processing Systems, Springer, 2021, ⟨10.1007/s11265-020-01628-w⟩
    HAL
    ICASSP
    IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)
    IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), May 2020, Barcelonne, Spain

    مصطلحات موضوعية: QC-LDPC, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], Theoretical computer science, Permutation (music), Selection (relational algebra), Computer science, Back-to-Back Butterfly Network, Permutation, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS], Concatenation, Butterfly Network, 02 engineering and technology, Multiplexer, Theoretical Computer Science, Set (abstract data type), [INFO.INFO-TS]Computer Science [cs]/Signal and Image Processing, 0202 electrical engineering, electronic engineering, information engineering, Index Terms-Butterfly Network, Process (computing), 020206 networking & telecommunications, [INFO.INFO-IA]Computer Science [cs]/Computer Aided Engineering, 020202 computer hardware & architecture, Constraint (information theory), Task (computing), Hardware and Architecture, Control and Systems Engineering, Modeling and Simulation, Signal Processing, Pattern recognition (psychology), Path (graph theory), [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, 020201 artificial intelligence & image processing, 5G, Information Systems

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::74d8cab3263df52b569b5e199f26aa5b
    https://hal.archives-ouvertes.fr/hal-03119275

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  4. 4
    GANNoC: A Framework for Automatic Generation of NoC Topologies using Generative Adversarial Networks

    المؤلفون: Maxime Mirka, Maxime France France Pillois, Gilles Sassatelli, Abdoulaye Gamatié

    المساهمون: ADAptive Computing (ADAC), Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier (LIRMM), Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS), Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)

    المصدر: 13th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO 2021)
    13th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO 2021), Jan 2021, Budapest, Hungary
    DroneSE/RAPIDO@HiPEAC
    13th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO 2021), Jan 2021, Budapest, Hungary. pp.51-58, ⟨10.1145/3444950.3447283⟩

    مصطلحات موضوعية: Exploit, Artificial neural network, Neural Networks, Computer science, Distributed computing, 020207 software engineering, 02 engineering and technology, [INFO.INFO-IA]Computer Science [cs]/Computer Aided Engineering, Network topology, 020202 computer hardware & architecture, Generative Adversarial Network, [INFO.INFO-AI]Computer Science [cs]/Artificial Intelligence [cs.AI], Adversarial system, NoC Topology, [SPI]Engineering Sciences [physics], Network on a chip, 0202 electrical engineering, electronic engineering, information engineering, [INFO]Computer Science [cs], Architecture, Graph generation, Network-on-Chip, Generative grammar

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::69769c091a26a1e77a45840c824e422f
    https://hal-lirmm.ccsd.cnrs.fr/lirmm-03107918/document

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  5. 5
    Breaking Analog Biasing Locking Techniques via Re-Synthesis

    المؤلفون: Marie-Minerve Louerat, Haralampos-G. Stratigopoulos, Mohamed Elshamy, Julian Leonhard

    المساهمون: Circuits Intégrés Numériques et Analogiques (CIAN), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)

    المصدر: 26th Asia and South Pacific Design Automation Conference (ASPDAC '21)
    26th Asia and South Pacific Design Automation Conference (ASPDAC '21), Jan 2021, Tokyo, Japan. ⟨10.1145/3394885.3431603⟩
    ASP-DAC

    مصطلحات موضوعية: Class (computer programming), Analogue electronics, Optimization algorithm, Computer science, Voltage control, 0211 other engineering and technologies, Regulator, Biasing, 02 engineering and technology, [INFO.INFO-IA]Computer Science [cs]/Computer Aided Engineering, Topology, [INFO.INFO-MO]Computer Science [cs]/Modeling and Simulation, 020202 computer hardware & architecture, [SPI.TRON]Engineering Sciences [physics]/Electronics, [INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR], Genetic algorithm, 0202 electrical engineering, electronic engineering, information engineering, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, 021106 design practice & management, Electronic circuit

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::db89484e33fb7c6a3e58282b313caec3
    https://hal.archives-ouvertes.fr/hal-02978491/document

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  6. 6
    Neuron fault tolerance in spiking neural networks

    المؤلفون: Engin Afacan, Theofilos Spyrou, Bernabe Linares-Barranco, Luis A. Camunas-Mesa, Sarah A. El-Sayed, Haralampos-G. Stratigopoulos

    المساهمون: Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo, Junta de Andalucía, Universidad de Sevilla, Circuits Intégrés Numériques et Analogiques (CIAN), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Instituto de Microelectrónica de Sevilla (IMSE-CNM), Universidad de Sevilla-Centro Nacional de Microelectronica [Spain] (CNM)-Consejo Superior de Investigaciones Científicas [Madrid] (CSIC)

    المصدر: 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE)
    2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), Feb 2021, Grenoble (virtuel), France
    DATE

    مصطلحات موضوعية: Spiking neural network, Computer science, 020208 electrical & electronic engineering, Real-time computing, Fault tolerance, 02 engineering and technology, Fault injection, Hardware_PERFORMANCEANDRELIABILITY, [INFO.INFO-IA]Computer Science [cs]/Computer Aided Engineering, Fault (power engineering), [INFO.INFO-MO]Computer Science [cs]/Modeling and Simulation, Fault detection and isolation, 020202 computer hardware & architecture, Power (physics), [INFO.INFO-AI]Computer Science [cs]/Artificial Intelligence [cs.AI], [SPI.TRON]Engineering Sciences [physics]/Electronics, 0202 electrical engineering, electronic engineering, information engineering, Overhead (computing), [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, IBM, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics

    وصف الملف: application/pdf

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ab7872a10d8722973d39a9920c9f8858

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  7. 7
    Methodology of Firmware Development for ARUZ—An FPGA-Based HPC System

    المؤلفون: Zbigniew Mudza, Rafal Kielbik, Kamil Rudnicki, Jaroslaw Jung

    المصدر: Electronics
    Volume 9
    Issue 9
    Electronics, Vol 9, Iss 1482, p 1482 (2020)

    مصطلحات موضوعية: Computer Networks and Communications, Computer science, lcsh:TK7800-8360, 02 engineering and technology, computer.software_genre, 01 natural sciences, computer aided engineering, reconfigurable architectures, High-level synthesis, 0103 physical sciences, VHDL, design automation, 0202 electrical engineering, electronic engineering, information engineering, Electrical and Electronic Engineering, high level synthesis, Field-programmable gate array, Massively parallel, computer.programming_language, 010302 applied physics, business.industry, Firmware, lcsh:Electronics, Code reuse, programmable logic arrays, 020202 computer hardware & architecture, high performance computing, Hardware and Architecture, Control and Systems Engineering, Embedded system, Signal Processing, Electronic design automation, business, computer

    وصف الملف: application/pdf

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5b1ac7f688ba39ba7dd9a48a1b72b1f2

    Find this article in full text from ProQuest
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  8. 8
    Developing Automatic Multi-Objective Optimization Methods for Complex Actuators

    المؤلفون: Lucian Vintan, Radu Chis

    المصدر: Advances in Electrical and Computer Engineering, Vol 17, Iss 4, Pp 89-98 (2017)

    مصطلحات موضوعية: lcsh:Computer engineering. Computer hardware, General Computer Science, Computer science, lcsh:TK7885-7895, 02 engineering and technology, actuators, 01 natural sciences, Multi-objective optimization, computer aided engineering, response surface methodology, Computer Science::Robotics, Computer Science::Systems and Control, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Response surface methodology, Electrical and Electronic Engineering, 010302 applied physics, business.industry, Control engineering, Physics::History of Physics, Computer Science::Other, 020202 computer hardware & architecture, machine learning, pareto optimization, lcsh:Electrical engineering. Electronics. Nuclear engineering, Computer-aided engineering, business, Actuator, lcsh:TK1-9971, Design space

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::47eef64a761d4d62bdf5f598297ca334
    https://doi.org/10.4316/aece.2017.04011

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  9. 9
    Spiking Neuron Hardware-Level Fault Modeling

    المؤلفون: Luis A. Camunas-Mesa, Theofilos Spyrou, Antonios Pavlidis, Bernabe Linares-Barranco, Haralampos-G. Stratigopoulos, Engin Afacan, Sarah A. El-Sayed

    المساهمون: Circuits Intégrés Numériques et Analogiques (CIAN), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Instituto de Microelectrónica de Sevilla (IMSE-CNM), Universidad de Sevilla-Centro Nacional de Microelectronica [Spain] (CNM)-Consejo Superior de Investigaciones Científicas [Madrid] (CSIC)

    المصدر: 2020 IEEE 26th International Symposium on
    Testing and Robust System Design (IOLTS)
    26th IEEE International Symposium on
    Testing and Robust System Design
    Testing and Robust System Design, Jul 2020, Naples, Italy. ⟨10.1109/IOLTS50870.2020.9159745⟩
    IOLTS

    مصطلحات موضوعية: Spiking neural network, business.industry, Computer science, Reliability (computer networking), Fault tolerance, 02 engineering and technology, Hardware_PERFORMANCEANDRELIABILITY, Fault modeling, [INFO.INFO-IA]Computer Science [cs]/Computer Aided Engineering, Fault (power engineering), [INFO.INFO-MO]Computer Science [cs]/Modeling and Simulation, 020202 computer hardware & architecture, Abstraction layer, [INFO.INFO-AI]Computer Science [cs]/Artificial Intelligence [cs.AI], [SPI.TRON]Engineering Sciences [physics]/Electronics, 0202 electrical engineering, electronic engineering, information engineering, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, Fault model, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business, Focus (optics), Computer hardware

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4a41b79f3891cc3142ac96adfc717eb1
    https://hal.archives-ouvertes.fr/hal-02873418

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  10. 10
    Hardware Trojan Attacks in Analog/Mixed-Signal ICs via the Test Access Mechanism

    المؤلفون: Giorgio Di Natale, Marie-Minerve Louerat, Antonios Pavlidis, Haralampos-G. Stratigopoulos, Mohamed Elshamy

    المساهمون: Circuits Intégrés Numériques et Analogiques (CIAN), LIP6, Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), Architectures and Methods for Resilient Systems (AMfoRS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)

    المصدر: 2020 IEEE European Test Symposium (ETS)
    IEEE European Test Symposium
    IEEE European Test Symposium, May 2020, Tallinn, Estonia. ⟨10.1109/ETS48528.2020.9131560⟩
    ETS

    مصطلحات موضوعية: Digital electronics, Analogue electronics, business.industry, Computer science, Interface (computing), Payload (computing), 0211 other engineering and technologies, Mixed-signal integrated circuit, 02 engineering and technology, Hardware_PERFORMANCEANDRELIABILITY, [INFO.INFO-IA]Computer Science [cs]/Computer Aided Engineering, [INFO.INFO-MO]Computer Science [cs]/Modeling and Simulation, Die (integrated circuit), 020202 computer hardware & architecture, [SPI.TRON]Engineering Sciences [physics]/Electronics, Footprint (electronics), Hardware Trojan, 0202 electrical engineering, electronic engineering, information engineering, Hardware_INTEGRATEDCIRCUITS, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business, Computer hardware, 021106 design practice & management, Hardware_LOGICDESIGN

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3488a8ac81db88d6b371446a5a4ec253
    https://hal.archives-ouvertes.fr/hal-02532389

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