يعرض 1 - 10 نتائج من 142 نتيجة بحث عن '"Stack register"', وقت الاستعلام: 1.48s تنقيح النتائج
  1. 1
    Region-based dual bank register allocation for reduced instruction encoding Architectures

    المؤلفون: Soo-Mook Moon, Je-Hyung Lee, Jinpyo Park

    المصدر: Microprocessors and Microsystems. 55:26-43

    مصطلحات موضوعية: Instruction register, Memory buffer register, Computer Networks and Communications, Computer science, 0211 other engineering and technologies, Register file, 02 engineering and technology, Parallel computing, Operand, Memory address register, Artificial Intelligence, Control register, 0202 electrical engineering, electronic engineering, information engineering, Hardware_REGISTER-TRANSFER-LEVELIMPLEMENTATION, 021106 design practice & management, Hardware_MEMORYSTRUCTURES, Processor register, Register renaming, Stack register, 020202 computer hardware & architecture, Hardware and Architecture, Status register, Hardware_CONTROLSTRUCTURESANDMICROPROGRAMMING, Memory data register, Software, Register allocation

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_________::8d1b15b9747b064d8ea4359ffffc04ad
    https://doi.org/10.1016/j.micpro.2017.09.005

    View record from ScienceDirect
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  2. 2
    VecRA

    المؤلفون: Szu-Chien Chen, Yi-Ping You

    المصدر: ACM Transactions on Embedded Computing Systems. 15:1-30

    مصطلحات موضوعية: Processor register, Computer science, 020208 electrical & electronic engineering, Register renaming, 02 engineering and technology, Parallel computing, Register window, computer.software_genre, Stack register, 020202 computer hardware & architecture, Hardware and Architecture, Control register, Status register, 0202 electrical engineering, electronic engineering, information engineering, Operating system, Memory data register, Hardware_REGISTER-TRANSFER-LEVELIMPLEMENTATION, computer, Software, Register allocation

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_________::ce6fc4e1f71a591d921d109b198abb2a
    https://doi.org/10.1145/2961026

    View Record from ACM Digital Library
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  3. 3
    Enabling energy-proportional computing on instruction-level parallel processors

    المؤلفون: Tse-An Liu, Yung-Cheng Ma, Wen-Shih Chao

    المصدر: The Journal of Supercomputing. 71:391-447

    مصطلحات موضوعية: Power gating, Processor register, Computer science, Processor design, Register file, Instruction scheduling, Stack register, Theoretical Computer Science, Scheduling (computing), Idle, Computer architecture, Hardware and Architecture, Very long instruction word, Energy proportional computing, Software, Information Systems, Register allocation

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_________::2b7b5d3b18294784e6d2022de1cd2f3b
    https://doi.org/10.1007/s11227-014-1301-z

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  4. 4
    Register spilling via transformed interference equations for PAC DSP architecture

    المؤلفون: Chung-Ju Wu, Jenq Kuen Lee, Chia-Han Lu

    المصدر: Concurrency and Computation: Practice and Experience. 26:779-799

    مصطلحات موضوعية: Computer Networks and Communications, Computer science, Register file, Optimizing compiler, Parallel computing, computer.software_genre, Theoretical Computer Science, Memory address register, Control register, Hardware_REGISTER-TRANSFER-LEVELIMPLEMENTATION, Hardware_MEMORYSTRUCTURES, Processor register, FLAGS register, Register renaming, Register window, Stack register, Computer Science Applications, Computational Theory and Mathematics, Very long instruction word, Status register, Index register, Compiler, Hardware_CONTROLSTRUCTURESANDMICROPROGRAMMING, computer, Software, Register allocation

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_________::e5080fb26204d1b6dadc24433969ddd3
    https://doi.org/10.1002/cpe.3051

    View record at Wiley
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  5. 5
    Cost Effective Physical Register Sharing

    المؤلفون: Arthur Perais, André Seznec

    المساهمون: Amdahl's Law is Forever (ALF), Inria Rennes – Bretagne Atlantique, Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-ARCHITECTURE (IRISA-D3), Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA), CentraleSupélec-Télécom Bretagne-Université de Rennes 1 (UR1), Université de Rennes (UNIV-RENNES)-Université de Rennes (UNIV-RENNES)-Institut National de Recherche en Informatique et en Automatique (Inria)-École normale supérieure - Rennes (ENS Rennes)-Université de Bretagne Sud (UBS)-Centre National de la Recherche Scientifique (CNRS)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-CentraleSupélec-Télécom Bretagne-Université de Rennes 1 (UR1), Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA), Université de Rennes (UNIV-RENNES)-Université de Rennes (UNIV-RENNES)-École normale supérieure - Rennes (ENS Rennes)-Université de Bretagne Sud (UBS)-Centre National de la Recherche Scientifique (CNRS)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA), IEEE, European Project: 267175,EC:FP7:ERC,ERC-2010-AdG_20100224,DAL(2011), Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Université de Bretagne Sud (UBS)-École normale supérieure - Rennes (ENS Rennes)-Institut National de Recherche en Informatique et en Automatique (Inria)-Télécom Bretagne-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)-Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Université de Bretagne Sud (UBS)-École normale supérieure - Rennes (ENS Rennes)-Institut National de Recherche en Informatique et en Automatique (Inria)-Télécom Bretagne-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)-Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Université de Bretagne Sud (UBS)-École normale supérieure - Rennes (ENS Rennes)-Télécom Bretagne-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)

    المصدر: International Symposium on High Performance Computer Architecture
    International Symposium on High Performance Computer Architecture, IEEE, Mar 2016, Barcelona, Spain. ⟨10.1109/HPCA.2016.7446105⟩
    HPCA

    مصطلحات موضوعية: 010302 applied physics, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], Memory buffer register, Computer science, business.industry, Processor register, 02 engineering and technology, Parallel computing, 01 natural sciences, Stack register, 020202 computer hardware & architecture, Memory address register, Control register, Embedded system, Status register, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Memory data register, Hardware_CONTROLSTRUCTURESANDMICROPROGRAMMING, business, Hardware_REGISTER-TRANSFER-LEVELIMPLEMENTATION, Register allocation

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::40ce5498cfa96d4b8fb125bb520cfc0b
    https://hal.inria.fr/hal-01259137

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  6. 6
    Trace-based Register Allocation in a JIT Compiler

    المؤلفون: Matthias Grimmer, Hanspeter Mössenböck, Thomas Würthinger, Josef Eisl, Doug Simon

    المصدر: PPPJ

    مصطلحات موضوعية: 020203 distributed computing, Trace Register Allocation, Register Allocation, Virtual Machines, Computer science, Processor register, Linear Scan, 020207 software engineering, 02 engineering and technology, Parallel computing, Register window, computer.software_genre, Stack register, Trace Compilation, Allocator, Just-in-time compilation, Just-in-Time Compilation, 0202 electrical engineering, electronic engineering, information engineering, Compiler, Graph coloring, computer, Register allocation

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::80763472de65288e09f95632efcb56c2
    http://epub.jku.at/doi/10.1145/2972206.2972211

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  7. 7
    GPU register file virtualization

    المؤلفون: Murali Annavaram, Gokul Subramanian Ravi, Nam Sung Kim, Hyeran Jeon

    المصدر: MICRO

    مصطلحات موضوعية: Instruction register, Memory buffer register, Computer science, Register file, Thread (computing), Parallel computing, computer.software_genre, Instruction set, Memory address register, Control register, Hardware_REGISTER-TRANSFER-LEVELIMPLEMENTATION, Processor register, Computer file, FLAGS register, Register renaming, Register window, Stack register, Microarchitecture, Status register, Operating system, Index register, Hardware_CONTROLSTRUCTURESANDMICROPROGRAMMING, General-purpose computing on graphics processing units, Memory data register, computer, Register allocation

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_________::e56ecf8e7bcdb9dfbc952a9ce05ceaa7
    https://doi.org/10.1145/2830772.2830784

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  8. 8
    Qualifying non-volatile register files for embedded systems through compiler-directed write minimization and balancing

    المؤلفون: Maria Ruiz Varela, Chengmo Yang

    المصدر: VLSI-SoC

    مصطلحات موضوعية: Control register, Computer science, Processor register, business.industry, Embedded system, Status register, Register renaming, Register window, Memory data register, business, Hardware_REGISTER-TRANSFER-LEVELIMPLEMENTATION, Stack register, Register allocation

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_________::d206dd61c4cd0078dc21e700b7441228
    https://doi.org/10.1109/vlsi-soc.2015.7314397

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  9. 9
    Power-aware register assignment for large register file design

    المؤلفون: Bo-Syun Wang, Wann-Yun Shieh

    المصدر: The Journal of Supercomputing. 61:719-742

    مصطلحات موضوعية: Instruction register, Memory buffer register, Computer science, Register file, computer.software_genre, Execution time, Theoretical Computer Science, Program status word, Memory address register, Control register, Hardware_REGISTER-TRANSFER-LEVELIMPLEMENTATION, Processor register, FLAGS register, Register renaming, Register window, Stack register, Computer architecture, Hardware and Architecture, Status register, Operating system, Index register, Memory data register, computer, Software, Information Systems, Register allocation

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_________::8e30145ddc6c23cc2e9c15c35b5e4f9a
    https://doi.org/10.1007/s11227-011-0633-1

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  10. 10
    Leveraging Register Windows to Reduce Physical Registers to the Bare Minimum

    المؤلفون: Joan-Manuel Parcerisa, Antonio González, Eduardo Quinones

    المساهمون: Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors, Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors

    المصدر: UPCommons. Portal del coneixement obert de la UPC
    Universitat Politècnica de Catalunya (UPC)
    Recercat. Dipósit de la Recerca de Catalunya
    instname

    مصطلحات موضوعية: Instruction register, Memory buffer register, Computer science, Informàtica::Enginyeria del software [Àrees temàtiques de la UPC], File organization (Computer science), Register file, Parallel computing, computer.software_genre, Fitxers informàtics -- Organització, Theoretical Computer Science, Early register release, Memory address register, Control register, Hardware register, Hardware_REGISTER-TRANSFER-LEVELIMPLEMENTATION, Out-of-order execution, Processor register, Software architecture, FLAGS register, Register renaming, Register window, Stack register, Microarchitecture, Physical register file, Computational Theory and Mathematics, Hardware and Architecture, Status register, Operating system, Programari -- Disseny, Hardware_CONTROLSTRUCTURESANDMICROPROGRAMMING, Memory data register, computer, Software, Register windows, Register allocation

    وصف الملف: application/pdf

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b734a8ee5f1f3b9e781fcde57e87427e
    https://doi.org/10.1109/tc.2010.85

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