يعرض 1 - 3 نتائج من 3 نتيجة بحث عن '"Viraj Y. Sardesai"', وقت الاستعلام: 1.55s تنقيح النتائج
  1. 1
    High performance 14nm SOI FinFET CMOS technology with 0.0174µm2 embedded DRAM and 15 levels of Cu metallization

    المؤلفون: E. Engbrecht, Edward P. Maciejewski, Christopher D. Sheraw, R. Divakaruni, Zhengwen Li, Allen H. Gabor, L. Economikos, Fernando Guarin, N. Zhan, H-K Lee, MaryJane Brodsky, Kenneth J. Stein, Siyuranga O. Koswatta, Y. Yang, Byeong Y. Kim, J. Hong, A. Bryant, Herbert L. Ho, Ruqiang Bao, Nicolas Breil, Babar A. Khan, E. Woodard, W-H. Lee, C-H. Lin, A. Levesque, Kevin McStay, V. Basker, Viraj Y. Sardesai, C. Tran, A. Ogino, Reinaldo A. Vega, C. DeWan, Shreesh Narasimha, J-J. An, Amit Kumar, A. Aiyar, Ravikumar Ramachandran, W. Wang, X. Wang, W. Nicoll, D. Hoyos, A. Friedman, Barry Linder, Yongan Xu, E. Alptekin, Cathryn Christiansen, S. Polvino, Han Wang, Scott R. Stiffler, G. Northrop, S. Saudari, J. Rice, Saraf Iqbal Rashid, Sunfei Fang, Michael V. Aquilino, Z. Ren, B. Kannan, Geng Wang, Noah Zamdmer, T. Kwon, Paul D. Agnello, Hasan M. Nayfeh, S. Jain, Robert R. Robison, M. Hasanuzzaman, J. Cai, L. Lanzerotti, D. Wehelle-Gamage, Basanth Jagannathan, J. Johnson, E. Kaste, Kai Zhao, Huiling Shang, Carl J. Radens, Shariq Siddiqui, Y. Ke, D. Ferrer, Ximeng Guan, D. Conklin, K. Boyd, K. Henson, Siddarth A. Krishnan, Bernard A. Engel, H. Dong, S. Mahajan, Unoh Kwon, Dominic J. Schepis, William Y. Chang, Liyang Song, Brian J. Greene, Chengwen Pei, S.-J. Jeng, Clevenger Leigh Anne H, Vijay Narayanan, C. Zhu, Wai-kin Li, Henry K. Utomo, Wei Liu, Dureseti Chidambarrao

    المصدر: 2014 IEEE International Electron Devices Meeting.

    مصطلحات موضوعية: Engineering, Subthreshold conduction, business.industry, Processor design, Copper interconnect, Soi finfet, Hardware_PERFORMANCEANDRELIABILITY, Thread (computing), Planar, CMOS, Hardware_INTEGRATEDCIRCUITS, Electronic engineering, business, Dram

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_________::6233530b0b3fd6ddc14276a018716523
    https://doi.org/10.1109/iedm.2014.7046977

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  2. 2
    Blanket SMT With In Situ N2 Plasma Treatment on the $\langle \hbox{100} \rangle$ Wafer for the Low-Cost Low-Power Technology Application

    المؤلفون: R. Divakaruni, O.S. Kwon, J. Yuan, Huiling Shang, V. Varadarajan, Viraj Y. Sardesai, M. Yu, Nivo Rovedo, Jong Ho Yang, Ying Li, Yong Meng Lee, N. Cave, M.P. Belyansky, Victor Chan, M. Eller, Y.K. Jeong, Narasimhulu Kanike

    المصدر: IEEE Electron Device Letters. 30:916-918

    مصطلحات موضوعية: Surface-mount technology, Negative-bias temperature instability, Materials science, business.industry, Electrical engineering, Nitride, Electronic, Optical and Magnetic Materials, PMOS logic, Reliability (semiconductor), Low-power electronics, MOSFET, Optoelectronics, Wafer, Electrical and Electronic Engineering, business

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_________::96dc47019da4a545a11188ae782aa0d7
    https://doi.org/10.1109/led.2009.2025895

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  3. 3
    Assessment of fully-depleted planar CMOS for low power complex circuit operation

    المؤلفون: Z. Ren, Pranita Kulkarni, R. Zhang, Huiming Bu, D.-G. Park, Viraj Y. Sardesai, Sanjay Mehta, Thomas S. Kanarsky, Kangguo Cheng, Yu Zhu, Keith H. Tabakman, J. Cai, Lisa F. Edge, Ali Khakifirooz, S. Kanakasabapathy, J. Koshy, P. Lindo, S. Wu, Bruce B. Doris

    المصدر: 2011 International Electron Devices Meeting.

    مصطلحات موضوعية: Planar, Materials science, CMOS, Low-power electronics, Hardware_INTEGRATEDCIRCUITS, Electronic engineering, Silicon on insulator, Wafer, Hardware_PERFORMANCEANDRELIABILITY, Static random-access memory, Power (physics), Electronic circuit

    URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_________::10154907d6e4d5abb6e8c114b587399c
    https://doi.org/10.1109/iedm.2011.6131560

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