يعرض 1 - 10 نتائج من 31 نتيجة بحث عن '"Xu, Rongjin"', وقت الاستعلام: 0.86s تنقيح النتائج
  1. 1
    مؤتمر
    A 915MHz $19\mu \mathrm{W}$ Blocker-Enhanced Wake-Up Receiver with Frequency-Hopping Two-Tone Modulation Achieving 53dB Tolerance to In-Band Interference

    المؤلفون: Ren, Heyu, Ye, Dawei, Chen, Binbin, Jin, Xu, Gong, Wenjun, Xu, Rongjin, Shi, C.-J. Richard

    المصدر: 2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Radio Frequency Integrated Circuits Symposium (RFIC), 2022 IEEE. :299-302 Jun, 2022

    Relation: 2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)

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  2. 2
    مؤتمر
    A 0.021mm2 65nm CMOS 2.5GHz Digital Injection-Locked Clock Multiplier with Injection Pulse Shaping Achieving −79dBc Reference Spur and 0.496mW/GHz Power Efficiency

    المؤلفون: Xu, Rongjin, Ye, Dawei, Li, Sirou, Shi, C. -J. Richard

    المصدر: 2022 IEEE International Solid-State Circuits Conference (ISSCC) Solid-State Circuits Conference (ISSCC), 2022 IEEE International. 65:214-216 Feb, 2022

    Relation: 2022 IEEE International Solid-State Circuits Conference (ISSCC)

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  3. 3
    مؤتمر
    A Two-Tone Wake-Up Receiver with an Envelope-Detector-First Architecture Using Envelope Biasing and Active Inductor Load Achieving 41/33dB In-Band Rejection to CW/AM Interference

    المؤلفون: Ye, Dawei, Tu, Yuting, Gong, Wenjun, Xu, Rongjin, Shi, C. -J. Richard

    المصدر: 2021 IEEE Asian Solid-State Circuits Conference (A-SSCC) Solid-State Circuits Conference (A-SSCC), 2021 IEEE Asian. :1-3 Nov, 2021

    Relation: 2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)

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  4. 4
    مؤتمر
    A 400 MHz, 8-Bit, 1.75-ps Resolution Pipelined-Two-Step Time-to-Digital Converter with Dynamic Time Amplification

    المؤلفون: Tu, Yuting, Xu, Rongjin, Ye, Dawei, Lyu, Liangjian, Shi, C.-J. Richard

    المصدر: 2020 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and Systems (ISCAS), 2020 IEEE International Symposium on. :1-4 Oct, 2020

    Relation: 2020 IEEE International Symposium on Circuits and Systems (ISCAS)

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  5. 5
    مؤتمر
    A 2.0-2.9 GHz Digital Ring-Based Injection-Locked Clock Multiplier Using a Self-Alignment Frequency Tracking Loop for Reference Spur Reduction

    المؤلفون: Xu, Rongjin, Ye, Dawei, Lyu, Liangjian, Shi, C.-J. Richard

    المصدر: 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Radio Frequency Integrated Circuits Symposium (RFIC), 2020 IEEE. :11-14 Aug, 2020

    Relation: 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)

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  6. 6
    مؤتمر
    A 2.46GHz, −88dBm Sensitivity CMOS Passive Mixer-First Nonlinear Receiver with >50dB Tolerance to In-Band Interferer

    المؤلفون: Ye, Dawei, Xu, Rongjin, Lyu, Liangjian, Shi, C.-J. Richard

    المصدر: 2019 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and Systems (ISCAS), 2019 IEEE International Symposium on. :1-4 May, 2019

    Relation: 2019 IEEE International Symposium on Circuits and Systems (ISCAS)

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  7. 7
    مؤتمر
    26.4 A 2.4GHz 65nm CMOS Mixer-First Receiver Using 4-Stage Cascaded Inverter-Based Envelope-Biased LNAs Achieving 66dB In-Band Interference Tolerance and −83dBm Sensitivity

    المؤلفون: Ye, Dawei, Xu, Rongjin, Richard Shi, C.-J.

    المصدر: 2019 IEEE International Solid-State Circuits Conference - (ISSCC) Solid-State Circuits Conference - (ISSCC), 2019 IEEE International. :414-416 Feb, 2019

    Relation: 2019 IEEE International Solid-State Circuits Conference - (ISSCC)

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  8. 8
    دورية أكاديمية
    Evaluation of headland turning types of adjacent parallel paths for combine harvesters

    المؤلفون: Chen, Tiaotiao, Xu, Lizhang, Ahn, Ho Seok, Lu, En, Liu, Yanbin, Xu, Rongjin

    المصدر: In Biosystems Engineering September 2023 233:93-113

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  9. 9
    مؤتمر
    A 1.5-GS/s 5-bit interpolating ADC with offset averaging and interpolating sharing resistors network

    المؤلفون: Xu, Rongjin, Chen, Yongzhen, Wang, Mingshuo, Li, Ning, Ye, Fan, Ren, Junyan

    المصدر: 2015 IEEE 11th International Conference on ASIC (ASICON) ASIC (ASICON), 2015 IEEE 11th International Conference on. :1-4 Nov, 2015

    Relation: 2015 IEEE 11th International Conference on ASIC (ASICON )

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  10. 10
    دورية أكاديمية
    A 2.0–2.9 GHz ring-based injection-locked clock multiplier using a self-alignment frequency-tracking loop for reference spur reduction

    المؤلفون: Xu, Rongjin, Ye, Dawei, Richard Shi, C.-J.

    المصدر: In Integration May 2022 84:1-11

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