Process control for 45 nm CMOS logic gate patterning.

التفاصيل البيبلوغرافية
العنوان: Process control for 45 nm CMOS logic gate patterning.
المؤلفون: Le Gratiet, Bertrand, Gouraud, Pascal, Aparicio, Enrique, Babaud, Laurene, Dabertrand, Karen, Touchet, Mathieu, Kremer, Stephanie, Chaton, Catherine, Foussadier, Franck, Sundermann, Frank, Massin, Jean, Chapon, Jean-Damien, Gatefait, Maxime, Minghetti, Blandine, de-Caunes, Jean, Boutin, Daniel
المصدر: Proceedings of SPIE; Nov2008 Part 2, Issue 1, p69220Z-69220Z-11, 11p
قاعدة البيانات: Complementary Index