A 16-kb 9T Ultralow-Voltage SRAM With Column-Based Split Cell-VSS, Data-Aware Write-Assist, and Enhanced Read Sensing Margin in 28-nm FDSOI
| العنوان: | A 16-kb 9T Ultralow-Voltage SRAM With Column-Based Split Cell-VSS, Data-Aware Write-Assist, and Enhanced Read Sensing Margin in 28-nm FDSOI |
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| المؤلفون: | M. Sultan M. Siddiqui, Tony Tae-Hyoung Kim, Zhao Chuan Lee |
| المصدر: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 29:1707-1719 |
| بيانات النشر: | Institute of Electrical and Electronics Engineers (IEEE), 2021. |
| سنة النشر: | 2021 |
| مصطلحات موضوعية: | business.industry, Computer science, Electrical engineering, Port (circuit theory), Chip, Hardware and Architecture, Margin (machine learning), Virtual ground, Static random-access memory, Electrical and Electronic Engineering, business, Software, Energy (signal processing), Leakage (electronics), Voltage |
| الوصف: | This work proposes an static random access memory (SRAM) with column-based split cell-VSS (CS-CVSS), data-aware write-assist (DAWA), and enhanced read sensing margin in 28-nm FDSOI technology. The proposed CS-CVSS and DAWA techniques improve both half-selected (HS) static noise margin (SNM) and write margin. They also improve HS dynamic noise margin (HS-DNM) by leveraging write through virtual ground with reduced load in the proposed write port. The proposed 3T read port enhances sensing margin by minimizing read bitline leakage through negative gate-to-source voltage regardless of cell data. A 16-kb 9T SRAM test chip demonstrated the minimum operating voltage for write and read operations as 0.47 and 0.25 V, respectively. The minimum energy of 6.72 pJ is achieved at 0.5 V. |
| تدمد: | 1557-9999 1063-8210 |
| URL الوصول: | https://explore.openaire.eu/search/publication?articleId=doi_________::33683d7a947095ede6708fc16df5c95c https://doi.org/10.1109/tvlsi.2021.3102675 |
| حقوق: | CLOSED |
| رقم الأكسشن: | edsair.doi...........33683d7a947095ede6708fc16df5c95c |
| قاعدة البيانات: | OpenAIRE |
| تدمد: | 15579999 10638210 |
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