An 8T SRAM With On-Chip Dynamic Reliability Management and Two-Phase Write Operation in 28-nm FDSOI
| العنوان: | An 8T SRAM With On-Chip Dynamic Reliability Management and Two-Phase Write Operation in 28-nm FDSOI |
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| المؤلفون: | M. Sultan M. Siddiqui, Tony Tae-Hyoung Kim, Zhi Hui Kong, Zhao Chuan Lee |
| المصدر: | IEEE Journal of Solid-State Circuits. 54:2091-2101 |
| بيانات النشر: | Institute of Electrical and Electronics Engineers (IEEE), 2019. |
| سنة النشر: | 2019 |
| مصطلحات موضوعية: | Silicon, Computer science, 020208 electrical & electronic engineering, Phase (waves), chemistry.chemical_element, Silicon on insulator, Hardware_PERFORMANCEANDRELIABILITY, 02 engineering and technology, Power (physics), Reliability (semiconductor), chemistry, Temperature instability, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, Static random-access memory, Electrical and Electronic Engineering, Voltage, Degradation (telecommunications) |
| الوصف: | Bias temperature instability (BTI) degradation poses increasingly critical lifetime reliability design challenges in static random access memory (SRAM), as fabrication technology marches toward a very deep nanometer regime. This paper presents circuit techniques that enable on-chip dynamic reliability management, which intelligently monitors and mitigates the half-selected cell stability failure due to BTI degradation in SRAM. The dynamic reliability management is achieved through the automated BTI-aware write word-line (WWL) control, whereby it detects the BTI degradation in SRAM cells through a replica row-based BTI-aware stability monitor and adjusts the WWL voltage level with two-phase write operation (TPWO). The WWL voltage level is divided into two phases to maintain the half-selected cell stability with BTI without compromising other circuit parameters. Silicon validation of a 16-kb SRAM based on a 28-nm fully depleted silicon on insulator (FDSOI) technology successfully demonstrates that the half-selected cell stability failure is eliminated from 57.13% down to 0% with the proposed approach at a marginal 3.42% power and 10% area overheads. |
| تدمد: | 1558-173X 0018-9200 |
| URL الوصول: | https://explore.openaire.eu/search/publication?articleId=doi_________::96cc8c155ad69f99f727ce499d941f3f https://doi.org/10.1109/jssc.2019.2905343 |
| حقوق: | CLOSED |
| رقم الأكسشن: | edsair.doi...........96cc8c155ad69f99f727ce499d941f3f |
| قاعدة البيانات: | OpenAIRE |
| تدمد: | 1558173X 00189200 |
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