In this work, the drain-current mismatch is characterized from linear to the saturation regime. Characterizations are performed for N-MOS transistors with and without pocket-implants. A general drain-current mismatch model for transistors without pocket-implants, valid for any operation region, is also presented. It has been shown that correlated mobility and threshold voltage fluctuations must be considered to qualitatively model the experimental results. A comparison between devices with and without pocket-implants is performed and an important drain-current mismatch enhancement in the latter case is reported and discussed.
