تقرير
Sub-5-nm Ultra-thin In$_2$O$_3$ Transistors for High-Performance and Low-Power Electronic Applications
| العنوان: | Sub-5-nm Ultra-thin In$_2$O$_3$ Transistors for High-Performance and Low-Power Electronic Applications |
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| المؤلفون: | Xu, Linqiang, Xu, Lianqiang, Lan, Jun, Li, Yida, Li, Qiuhui, Wang, Aili, Guo, Ying, Ang, Yee Sin, Quhe, Ruge, Lu, Jing |
| سنة النشر: | 2023 |
| المجموعة: | Physics (Other) |
| مصطلحات موضوعية: | Physics - Applied Physics |
| الوصف: | Ultra-thin (UT) oxide semiconductors are promising candidates for back-end-of-line (BEOL) compatible transistors and monolithic three-dimensional integration. Experimentally, UT indium oxide (In$_2$O$_3$) field-effect transistors (FETs) with thicknesses down to 0.4 nm exhibits extremely high drain current (10000 $\mu$A/$\mu$m) and transconductance (4000 $\mu$S/$\mu$m). Here, we employ the ab initio quantum transport simulation to investigate the performance limit of sub-5-nm gate length (Lg) UT In$_2$O$_3$ FET. Based on the International Technology Roadmap for Semiconductors (ITRS) criteria for high-performance (HP) devices, the scaling limit of UT In$_2$O$_3$ FETs can reach 2 nm in terms of on-state current, delay time, and power dissipation. The wide bandgap nature of UT In$_2$O$_3$ (3.15 eV) renders it a suitable candidate for ITRS low-power (LP) electronics with Lg down to 3 nm. Both the HP and LP UT In$_2$O$_3$ FETs exhibit superior energy-delay products as compared to other common 2D semiconductors such as monolayer MoS2 and MoTe2. Our study unveils the immense promise of UT In$_2$O$_3$ for both HP and LP device applications. Comment: 16 pages, 7 figures |
| نوع الوثيقة: | Working Paper |
| URL الوصول: | http://arxiv.org/abs/2311.02943 |
| رقم الأكسشن: | edsarx.2311.02943 |
| قاعدة البيانات: | arXiv |
| الوصف غير متاح. |