دورية أكاديمية

Self-Assertion-Based Countermeasures Within a RISC-V Microprocessor for Coverage of Information Leakage Faults

التفاصيل البيبلوغرافية
العنوان: Self-Assertion-Based Countermeasures Within a RISC-V Microprocessor for Coverage of Information Leakage Faults
المؤلفون: Somoye, I., Mannos, T.J., Dziki, B., Plusquellic, J.
المصدر: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on. 43(6):1677-1690 Jun, 2024
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
تدمد:02780070
19374151
DOI:10.1109/TCAD.2024.3351592