PLL-SAR: A New High-Speed Analog to Digital Converter Architecture

التفاصيل البيبلوغرافية
العنوان: PLL-SAR: A New High-Speed Analog to Digital Converter Architecture
المؤلفون: Vesely, Vladimir, Lee, Calvin Yoji, Anand, Tejasvi, Moon, Un-Ku
المصدر: 2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS) Circuits and Systems (MWSCAS), 2023 IEEE 66th International Midwest Symposium on. :84-88 Aug, 2023
Relation: 2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS)
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:9798350302103
تدمد:15583899
DOI:10.1109/MWSCAS57524.2023.10405967