التفاصيل البيبلوغرافية
| العنوان: |
Low DRAM Memory Access and Flexible Dataflow Convolutional Neural Network Accelerator based on RISC-V Custom Instruction |
| المؤلفون: |
Chen, Yi-Fan, Chang, Yu-Jen, Chiu, Ching-Te, Huang, Ming-Long, Liang, Geng-Ming, Lee, Chao-Lin, Lee, Jenq-Kuen, Hsieh, Ping-Yu, Lai, Wei-Chih |
| المصدر: |
2024 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and Systems (ISCAS), 2024 IEEE International Symposium on. :1-5 May, 2024 |
| Relation: |
2024 IEEE International Symposium on Circuits and Systems (ISCAS) |
| قاعدة البيانات: |
IEEE Xplore Digital Library |
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