Hardware/software co-training by FPGA/ASIC synthesis and programming of a RISC microprocessor-core

التفاصيل البيبلوغرافية
العنوان: Hardware/software co-training by FPGA/ASIC synthesis and programming of a RISC microprocessor-core
المؤلفون: Becker, J.E., Bieser, C., Thomas, A., Muller-Glaser, K.D., Becker, J.
المصدر: Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Microelectronic systems education Microelectronic Systems Education, 2003. Proceedings. 2003 IEEE International Conference on. :134-135 2003
Relation: Microelectronic Systems Education Conference
قاعدة البيانات: IEEE Xplore Digital Library