Technology booster using strain-enhancing laminated SiN (SELS) for 65nm node HP MPUs

التفاصيل البيبلوغرافية
العنوان: Technology booster using strain-enhancing laminated SiN (SELS) for 65nm node HP MPUs
المؤلفون: Goto, K., Satoh, S., Ohta, H., Fukuta, S., Yamamoto, T., Mori, T., Tagawa, Y., Sakuma, T., Saiki, T., Shimamune, Y., Katakami, A., Hatada, A., Morioka, H., Hayami, Y., Inagaki, S., Kawamura, K., Kim, Y., Kokura, H., Tamura, N., Horiguchi, N., Kojima, M., Sugii, T., Hashimoto, K.
المصدر: IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004. Electron devices meeting Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International. :209-212 2004
Relation: 2004 International Electron Devices Meeting
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:0780386841
9780780386846
DOI:10.1109/IEDM.2004.1419111