Introducing RapidHDL: A New Library to Design FPGA Hardware in Microsoft. Net and Automatically Generate Verilog Netlists

التفاصيل البيبلوغرافية
العنوان: Introducing RapidHDL: A New Library to Design FPGA Hardware in Microsoft. Net and Automatically Generate Verilog Netlists
المؤلفون: Allen, J.N., Abdel-Aty-Zohdy, H.S., Ewing, R.L.
المصدر: 2006 IEEE International Conference on Electro/Information Technology Electro/information Technology, 2006 IEEE International Conference on. :307-312 May, 2006
Relation: 2006 IEEE International Conference on Electro/Information Technology
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:0780395921
9780780395923
078039593X
9780780395930
تدمد:21540357
21540373
DOI:10.1109/EIT.2006.252153