دورية أكاديمية

A Medium-Grain Reconfigurable Architecture for DSP: VLSI Design, Benchmark Mapping, and Performance

التفاصيل البيبلوغرافية
العنوان: A Medium-Grain Reconfigurable Architecture for DSP: VLSI Design, Benchmark Mapping, and Performance
المؤلفون: Myjak, M. J., Delgado-Frias, J. G.
المصدر: IEEE Transactions on Very Large Scale Integration (VLSI) Systems IEEE Trans. VLSI Syst. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on. 16(1):14-23 Jan, 2008
قاعدة البيانات: IEEE Xplore Digital Library