Advanced junction profile design scheme by low-temperature millisecond annealing and co-implant for high performance CMOS

التفاصيل البيبلوغرافية
العنوان: Advanced junction profile design scheme by low-temperature millisecond annealing and co-implant for high performance CMOS
المؤلفون: Ikeda, K., Miyashita, T., Kubo, T., Yamamoto, T., Sukegawa, T., Okabe, K., Ohta, H., Kim, Y. S., Nagai, H., Nishikawa, M., Shimamune, Y., Hatada, A., Hayami, Y., Ohkoshi, K., Tamura, N., Sukegawa, K., Kurata, H., Satoh, S., Kase, M., Sugii, T.
المصدر: 2008 Symposium on VLSI Technology VLSI Technology, 2008 Symposium on. :188-189 Jun, 2008
Relation: 2008 Symposium on VLSI Technology
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:9781424418022
9781424418039
تدمد:07431562
21589682
DOI:10.1109/VLSIT.2008.4588613