دورية أكاديمية
A partition and resynthesis approach to testable design of large circuits
| العنوان: | A partition and resynthesis approach to testable design of large circuits |
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| المؤلفون: | Kanjilal, S., Chakradhar, S.T., Agrawal, V.D. |
| المصدر: | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on. 14(10):1268-1276 Oct, 1995 |
| قاعدة البيانات: | IEEE Xplore Digital Library |
Full Text Finder | تدمد: | 02780070 19374151 |
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| DOI: | 10.1109/43.466342 |