التفاصيل البيبلوغرافية
| العنوان: |
A power-efficient 3-D on-chip interconnect for multi-core accelerators with stacked L2 cache |
| المؤلفون: |
Kang, Kyungsu, Park, Sangho, Lee, Jong-Bae, Benini, Luca, De Micheli, Giovanni |
| المصدر: |
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE) Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016. :1465-1468 Mar, 2016 |
| Relation: |
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE) |
| قاعدة البيانات: |
IEEE Xplore Digital Library |
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