A 3.25 GS/s 4-Tap analog FIR filter design with coefficient control using 6-bit split-capacitor DAC as a tunable coefficient multiplier

التفاصيل البيبلوغرافية
العنوان: A 3.25 GS/s 4-Tap analog FIR filter design with coefficient control using 6-bit split-capacitor DAC as a tunable coefficient multiplier
المؤلفون: Park, Shinwoong, Shin, Dongseok, Koh, Kwang-jin, Raman, Sanjay
المصدر: 2016 IEEE Dallas Circuits and Systems Conference (DCAS) Circuits and Systems Conference (DCAS), 2016 IEEE Dallas. :1-4 Oct, 2016
Relation: 2016 IEEE Dallas Circuits and Systems Conference (DCAS)
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:9781509027576
DOI:10.1109/DCAS.2016.7791142