التفاصيل البيبلوغرافية
| العنوان: |
A Block-Floating-Point Arithmetic Based FPGA Accelerator for Convolutional Neural Networks |
| المؤلفون: |
Zhang, Heshan, Liu, Zhenyu, Zhang, Guanwen, Dai, Jiwu, Lian, Xiaocong, Zhou, Wei, Ji, Xiangyang |
| المصدر: |
2019 IEEE Global Conference on Signal and Information Processing (GlobalSIP) Signal and Information Processing (GlobalSIP), 2019 IEEE Global Conference on. :1-5 Nov, 2019 |
| Relation: |
2019 IEEE Global Conference on Signal and Information Processing (GlobalSIP) |
| قاعدة البيانات: |
IEEE Xplore Digital Library |
