مؤتمر
A Sub-50fs-Jitter Sub-Sampling PLL with a Harmonic-Enhanced 30-GHz-Fundemental Class-C VCO in 0.18µm SiGe BiCMOS
العنوان: | A Sub-50fs-Jitter Sub-Sampling PLL with a Harmonic-Enhanced 30-GHz-Fundemental Class-C VCO in 0.18µm SiGe BiCMOS |
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المؤلفون: | Zhang, Yan, Liang, Chia-Jen, Chen, Christopher, Liu, Andrew, Woo, Jason, Pamarti, Sudhakar, Yang, Chih-Kong Ken, Chang, Mau-Chung Frank |
المصدر: | ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC) Solid State Circuits Conference (ESSCIRC), ESSCIRC 2021 - IEEE 47th European. :435-438 Sep, 2021 |
Relation: | ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC) |
قاعدة البيانات: | IEEE Xplore Digital Library |
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