مورد إلكتروني
VHDL modeling and simulation for a digital target imaging architecture for multiple large targets generation
العنوان: | VHDL modeling and simulation for a digital target imaging architecture for multiple large targets generation |
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المؤلفون: | Fouts, Douglas J., Shing, Man-Tak, Pace, Phillip E., Information Sciences (IS), Bergon, Hakan |
بيانات النشر: | Monterey California. Naval Postgraduate School September 2002 2012-08-22T15:30:09Z 2012-08-22T15:30:09Z 2002-09 |
نوع الوثيقة: | Electronic Resource |
مستخلص: | The subject of this thesis is to model and verify the correctness of the architecture of the Digital Image Synthesizer (DIS). The DIS, a system-on-a-chip, is especially useful as a counter-targeting repeater. It synthesizes the characteristic echo signature of a pre-selected target. The VHDL description of the DIS architecture was exported from Tanner S-Edit, modified, and simulated. Different software oriented verification approaches were researched and a White-box approach to functional verification was adopted. An algorithm based on the hardware functionality was developed to compare expected and simulated results. Initially, the architecture of one Range Bin Modulator was exported. Modifications to the VHDL source code included modeling of the behavior of the NFET and P-FET transistors as well as Ground and Vdd (the voltages connected to the drains of the FETs). It also included renaming of entities to comply with VHDL naming conventions. Simulation results were compared to manual calculations and Matlab programs to verify the architecture. The procedure was repeated for the architecture of an Eight-Range Bin Modulator with equally successful results. VHDL was then used to create a super class of a 32-Range Bin Modulator. Test vectors developed in Matlab were used to yet again verify correct functionality. http://archive.org/details/vhdlmodelingndsi109459795 Major, Swedish Army Approved for public release; distribution is unlimited. |
مصطلحات الفهرس: | Image transmission., Digital Image Synthesizer, Counter-Targeting Repeater, Range Bin Modulator, VHDL, White-box, Matlab, Thesis |
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الإتاحة: | Open access content. Open access content Copyright is reserved by the copyright owner. |
ملاحظة: | xviii, 174 p. : ill. (some col.) ; 28 cm. application/pdf |
أرقام أخرى: | AD# oai:calhoun.nps.edu:10945/9795 1142081232 |
المصدر المساهم: | NAVAL POSTGRADUATE SCH From OAIster®, provided by the OCLC Cooperative. |
رقم الأكسشن: | edsoai.on1142081232 |
قاعدة البيانات: | OAIster |
الوصف غير متاح. |