دورية أكاديمية

Development of Power Hardware-in-the-Loop Simulation Test-bed to Verify LVDC Grid Stability Using Offline Damping Impedance Design

التفاصيل البيبلوغرافية
العنوان: Development of Power Hardware-in-the-Loop Simulation Test-bed to Verify LVDC Grid Stability Using Offline Damping Impedance Design
المؤلفون: Lim, Jae-Wook, Heo, Kyung-Wook, Jeon, Chan-o, Kim, Ho-sung, Jung, Jee-HoonAff1, IDs42835024018178_cor5
المصدر: Journal of Electrical Engineering & Technology. 19(5):3297-3308
قاعدة البيانات: Springer Nature Journals