دورية أكاديمية

Design A Low Power and High Throughput 130nm Full Adder Utilising Exclusive-OR And Exclusive- NOR Gates.

التفاصيل البيبلوغرافية
العنوان: Design A Low Power and High Throughput 130nm Full Adder Utilising Exclusive-OR And Exclusive- NOR Gates.
المؤلفون: NUTHALAPATI, SONIYA, NUTALAPATI, KUSUMA, RANI, KALAPALA RADHIKA, SASIREKHA, LINGISETTY LOURDU, MEKALA, SIRISHA, MOHAMMAD, FIRDOSIA PARVEEN
المصدر: Journal of VLSI Circuits & Systems (JVCS); 2021, Vol. 3 Issue 2, p42-47, 6p
مصطلحات موضوعية: INTEGRATED circuits, COMPOSITE structures, TRANSISTORS, GRAPHIC arts, DESIGN
مستخلص: This literature illustrates the high speed and low power Full Adder (FADD) designs. This study relates to the composited structure of FADD design composed in one unit. In this the EXCL-OR/EXCL-NOR designs are used to design the FADD. Mostly concentrates on high speed standard FADD structure by combining the EXCLOR/ EXCL-NOR design in single unit. We implemented two composite structures of FADD through the full swing EXCL-OR/EXCL-NOR designs. And the EXCL-OR/EXCL-NOR design is done through pass transistor logic (PTL) and the same design projected on the composited FADD design. Such that the delay, area of the design, power requirement for the circuit gets optimized. The two composited FADD designs are compared and reduced the constraints of power requirement, area, delay and the power delay product (PDP). The simulated outcomes are verified through 130nnm CMOS mentor graphics tool. [ABSTRACT FROM AUTHOR]
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قاعدة البيانات: Complementary Index
الوصف
تدمد:25821458
DOI:10.31838/jvcs/03.02.05