التفاصيل البيبلوغرافية
| العنوان: |
A Low-Power Single-Weight-Combiner 802.11abg SoC in 0.13 µm CMOS for Embedded Applications Utilizing An Area and Power Efficient Cartesian Phase Shifter and Mixer Circuit. |
| المؤلفون: |
Afsahi, Ali, Rael, Jacob J., Behzad, Arya, Hung-Ming (Ed) Chien, Pan, Michael, Au, Stephen, Ojo, Adedayo, Lee, C. Paul, Anand, Seema Butala, Chien, Kevin, Wu, Stephen, Roufoogaran, Rozi (Razieh), Zolfaghari, Alireza, Leete, John C., Tran, Long, Carter, Keith A., Nariman, Mohammad, Wai-Ki Yeung, Keno, Morton, Walter, Gonikberg, Mark |
| المصدر: |
IEEE Journal of Solid-State Circuits; May2008, Vol. 43 Issue 5, p1101-1118, 18p, 40 Black and White Photographs, 11 Diagrams, 2 Charts, 11 Graphs |
| مصطلحات موضوعية: |
ADAPTIVE control systems, RADIO technology equipment, PHASE shifters, INTEGRATED circuits, COMPLEMENTARY metal oxide semiconductors, FREQUENCY synthesizers |
| مستخلص: |
A low-power 802.llabg SoC which achieves the best reported sensitivity as well as lowest reported power consumption and utilizes an extensive array of auto calibrations is reported. This SoC utilizes a two-antenna array receiver to build a single weight combiner (SWC) system. A new signal-path Cartesian phase generation and combination technique is proposed that shifts the RF signal in 22.5° phase steps. A 3 dB improvement in received SNR is achieved in comparison to the single path receiver. The radio and AFE occupy 10 mm2 of area in a digital 0.13 jim CMOS process of which 0.29 mm2 is occupied by the SWC RF receiver. The radio+AFE consume 85 mW of power in active Rx mode of which 30 mW is utilized by the SWC RF front-end. [ABSTRACT FROM AUTHOR] |
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