مؤتمر
A 64Mb SRAM in 32nm High-k metal-gate SOI technology with 0.7V operation enabled by stability, write-ability and read-ability enhancements.
| العنوان: | A 64Mb SRAM in 32nm High-k metal-gate SOI technology with 0.7V operation enabled by stability, write-ability and read-ability enhancements. |
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| المؤلفون: | Pilo, H., Arsovski, I., Batson, K., Braceras, G., Gabric, J., Houle, R., Lamphier, S., Pavlik, F., Seferagic, A., Liang-Yu Chen, Shang-Bin Ko, Radens, C. |
| المصدر: | 2011 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC); 2011, p254-256, 3p |
| قاعدة البيانات: | Complementary Index |
Full Text Finder | ردمك: | 9781612843032 |
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| DOI: | 10.1109/ISSCC.2011.5746307 |