Low-k interconnect stack with metal-insulator-metal capacitors for 22nm high volume manufacturing

التفاصيل البيبلوغرافية
العنوان: Low-k interconnect stack with metal-insulator-metal capacitors for 22nm high volume manufacturing
المؤلفون: C. Ege, A. Agrawal, A. Schmitz, A. Kandas, T. Mule, M. Buehler, D. Rao, J. Hicks, P. Parthangal, David Jones, P. Yashar, R. McFadden, Kaizad Mistry, R. Ascazubi, V. Chikarmane, K. S. Lee, N. Speer, J. Roesler, C. Ganpule, Guotao Wang, D. Ingerly, Timothy E. Glassman, R. Grover, A. Blattner, Y. Shusterman, Manvi Sharma, H. Khan, A. Madhavan, N. Lazo, P. Tiwari, P. Hentges, J. Shin, D. Parsons, Sudarshan Rangaraj, H. Liu, B. Choudhury, F. Cinnor
المصدر: 2012 IEEE International Interconnect Technology Conference.
بيانات النشر: IEEE, 2012.
سنة النشر: 2012
مصطلحات موضوعية: Interconnection, Materials science, business.industry, Electrical engineering, Oxide, Dielectric, Capacitance, law.invention, Stress (mechanics), chemistry.chemical_compound, Capacitor, Stack (abstract data type), chemistry, law, Optoelectronics, Process optimization, business
الوصف: We describe interconnect features for Intel's 22nm high-performance logic technology, with metal-insulator-metal capacitors and nine layers of interconnects. Metal-1 through Metal-6 feature a new ultra-low-k carbon doped oxide (CDO) and a low-k etch stop. Metal-7 and Metal-8 use a low-k CDO. New materials and process optimization provide 13–18% capacitance improvement. Single-exposure patterning for 80nm pitch layers makes the process cost-effective.
URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_________::0c76256ec386ece7a609902e2d6a446d
https://doi.org/10.1109/iitc.2012.6251663
رقم الأكسشن: edsair.doi...........0c76256ec386ece7a609902e2d6a446d
قاعدة البيانات: OpenAIRE