In this work, we propose a novel split-gate FeFET (SG-FeFET) with two separate external gates to dynamically modulate the memory window (MW) for non-volatile memory and neuromorphic applications. During read operation, only one gate is turned on to decrease the area ratio $(\text{A}_{\text{FE}}/\text{A}_{\text{IL}})$ of ferroelectric layer to insulator layer, which increases MW and read current ratio $(\text{I}_{\text{Read}_{-}1}/\text{I}_{\text{Read}_{-}0})$ . During write operation (program/erase), both two gates are turned on to increase $\text{A}_{\text{FE}}/\text{A}_{\text{IL}}$ , which decreases MW, thereby resulting in lower write voltage $(\text{V}_{\text{Write}})$ . Compared to FeFET, SG-FeFET (1) Demonstrates lower $\text{V}_{\text{Write}}(=1.85\text{V})$ and 59.5% reduction in write energy at fixed $\text{I}_{\text{Read}_{-}1}/\text{I}_{\text{Read}_{-}0};(2)$ Exhibits lower read energy (-11.3%) and higher $\text{I}_{\text{Read}_{-}\text{1}/\text{I}_{\text{Read}_{-}0}}(=8.6\text{E}6)$ at fixed $\text{V}_{\text{Write}};(3)$ Allows random access and eliminates half-select disturb; (4) Preserves higher endurance due to lower $\text{V}_{\text{Write}}$ and charge trapping. SG-FeFET as synaptic device also exhibits superior symmetry and linearity for potentiation and depression process.
