3D multilayer photonics platform integrated with bulk Si or SOI can enable intra-chip optical connections and data processing without interfering with the on-chip electronics. Multi-layer integration has the potential to increase device density, offers more functionality in terms of novel materials and devices stacked in a multilayer assembly. It has been shown that interlayer coupling can be achieved by creating slopes between the two layers [1–3]. In this work, fabrication and preliminary characterisation of vertical directional coupler is demonstrated for optical signal distribution between two Si layers of the device. Lumerical was used to simulate waveguide geometry and coupling length. The bottom waveguide layer was fabricated on a 400nm SOI using e-beam lithography and inductively coupled plasma (ICP) etching. Fully etched waveguides of width 500nm were fabricated with input and output gratings for light coupling. This is followed by deposition of 1 μm thick SiO 2 on the waveguide and the geometry was planarised using chemical mechanical polishing (CMP) leaving 100 nm oxide on top of the bottom waveguide layer. A 10 nm silicon nitride layer was deposited on it as etch-stop layer for buffered HF. Then another 1 μm thick layer of SiO 2 is deposited and interlayer slope angle of 13.4° was formed using HF wet etch. Next, a 400 nm of low-loss amorphous Si (a-Si) was deposited by hot-wire chemical vapour deposition (HWCVD) [4] and waveguides with similar dimensions to that of bottom layer were fabricated and capped with another 1 pm of oxide. The gap between the bottom crystalline silicon and the top a-Si is 100nm. Fig. 1(a) shows SEM of the cross-section, (b) shows microscope image of the top view of the fabricated device and (c) the schematic of the vertical coupler. The waveguides were measured using tunable laser with wavelengths from 1540–1620 nm by coupling light into grating couplers using single mode fiber in TE polarisation and their transmission is plotted in Fig. 1 (d).
