Problems of designing circuits including being sensitive to parasitic elements, inaccurate design equations, complicated manual calculations, requiring a large number of trials and errors and lack of accurate passive integrated element model have motivated engineers to look for computer-aided design (CAD) methods. In this paper, a CAD tool is presented through linking Hspice and grasshopper optimization algorithm aiming to design a double-tail comparator optimally. This tool employs accurate model of transistors and considers all parasitic elements, to obtain results which are close to reality. The proposed tool minimizes multiple objectives simultaneously and presents a set of optimal solutions as a Pareto front. The designer can select any configuration and extract circuit parameters considering the specific application and understanding the relationship between objective functions. Finally, the designer evaluates the final solutions by verifying the design at PVT corners.
