In some of the plasma etching processes such as contact hole etching, sidewall etching and some other device specific etching, the silicon surface is exposed directly to plasma during the etch. As a result, the silicon substrate suffers plasma induced damage which will potentially degrade device performance such as diode leakage or contact resistance etc. At the same time, we found that some substrate damage was deeply affected by the previous thermal and chemical history of the chamber. The purpose of the present work was to study the microstructure of plasma-induced damage in silicon as a function of etch chamber status, using a variety of surface analyses. A second purpose was to study whether plasma-induced lattice damage affects the current leakage characteristics of a p/sup +/-n junction. Finally, we suggest that it is necessary to monitor chamber status avoiding chamber "history" effect due to cross influence between different oxide etching recipe when implementing a new recipe at a stable etcher.
