Design and Construction of 3 x 3 Bits Programmable Logic Array (PLA) Circuit
| العنوان: | Design and Construction of 3 x 3 Bits Programmable Logic Array (PLA) Circuit |
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| المؤلفون: | San San Htwe, Sandar Win, Myint Myint Swe, Sanda Win |
| المصدر: | International Journal of Scientific Research in Science, Engineering and Technology. :179-183 |
| بيانات النشر: | Technoscience Academy, 2020. |
| سنة النشر: | 2020 |
| مصطلحات موضوعية: | X.3, Bit (horse), business.industry, Computer science, Hardware_INTEGRATEDCIRCUITS, business, Programmable logic array, Computer hardware, Hardware_LOGICDESIGN |
| الوصف: | A programmable logic array (PLA) is a kind of programmable logic device used to implement combinational logic circuits. The PLA has a set of programmable AND gate planes, which link to a set of programmable OR gate planes, which can then be conditionally complemented to produce an output. It has 2N AND gate s for N input variables and for M outputs from PLA, there should be M OR gates, each with programmable inputs from all of the AND gates. This layout allows for many logic functions to be synthesized in the sum of products canonical forms. The Programmable Logic Array (PLA) has a programmable AND array followed by a programmable OR array. Programmable Logic Array (PLA) circuit is built by using AND gates and OR gates. The 3x 4 bits data can be stored in this circuit. The large storage data bits of PLA circuit store by a using large AND-OR array with lots of inputs and product terms, and programmable connections. Programmable Logic Array circuit functions as ROM circuit. |
| تدمد: | 2394-4099 2395-1990 |
| URL الوصول: | https://explore.openaire.eu/search/publication?articleId=doi_________::5fbfa0ae653ecceb2136d01eeeb8ec9d https://doi.org/10.32628/ijsrset207347 |
| حقوق: | OPEN |
| رقم الأكسشن: | edsair.doi...........5fbfa0ae653ecceb2136d01eeeb8ec9d |
| قاعدة البيانات: | OpenAIRE |
| تدمد: | 23944099 23951990 |
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