This paper describes the design of the DeltaSigma fractional-N frequency synthesizer for digital video broadcasting-terrestrial (DVB-T) receiver, which is fabricated in a 0.18-mum CMOS technology. A 3-bit 4th order sigma-delta (DeltaSigma ) modulator is employed for the fractional value implementation. A single on-chip voltage-controlled oscillator (VCO) covers a wideband frequency range- 900MHz to 1730MHz (63.1%) and provides the local oscillator (LO) signal - 470MHz to 862MHz via divider-2. The frequency synthesizer supports the whole channels and keeps the loop stable in operating and the performance variation is minimized over the wide frequency band. The variation of channel-to-channel switching time is also reduced. The measurement results show in-band phase noise is less than -80 dBc/Hz and out-of-band phase noise at 1.25 MHz offset is less than -128 dBc/Hz over all frequency range. The total lock time is less than 300 mus. The implemented frequency synthesizer consumes 10mA from 2.8-V power-supply
