The performance requirements of vertex detectors for future linear collider experiments is very challenging especially for the detector's innermost sensor layers. The DEPleted Field Effect Transistor (DEPFET) combining detector and amplifier operation is capable to meet these requirements. A silicon technology is presented which allows production of large sensor arrays consisting of linear DEPFET detector structures. The envisaged pixel array offers a low noise and low power operation. To ensure a high radiation length a thinning technology based on direct wafer bonding is proposed.
