Fast Design Exploration for Performance, Power and Accuracy Tradeoffs in FPGA-Based Accelerators
| العنوان: | Fast Design Exploration for Performance, Power and Accuracy Tradeoffs in FPGA-Based Accelerators |
|---|---|
| المؤلفون: | R. Iris Bahar, Onur Can Ulusel, Sherief Reda, Kumud Nepal |
| المصدر: | ACM Transactions on Reconfigurable Technology and Systems. 7:1-22 |
| بيانات النشر: | Association for Computing Machinery (ACM), 2014. |
| سنة النشر: | 2014 |
| مصطلحات موضوعية: | Deblurring, Test case, General Computer Science, Computer engineering, Computer science, Design space exploration, Reconfigurability, Image processing, Parallel computing, Throughput (business), Nonlinear programming, Block (data storage) |
| الوصف: | The ease-of-use and reconfigurability of FPGAs makes them an attractive platform for accelerating algorithms. However, accelerating becomes a challenging task as the large number of possible design parameters lead to different accelerator variants. In this article, we propose techniques for fast design exploration and multi-objective optimization to quickly identify both algorithmic and hardware parameters that optimize these accelerators. This information is used to run regression analysis and train mathematical models within a nonlinear optimization framework to identify the optimal algorithm and design parameters under various objectives and constraints. To automate and improve the model generation process, we propose the use of L 1 -regularized least squares regression techniques.We implement two real-time image processing accelerators as test cases: one for image deblurring and one for block matching. For these designs, we demonstrate that by sampling only a small fraction of the design space (0.42% and 1.1%), our modeling techniques are accurate within 2%--4% for area and throughput, 8%--9% for power, and 5%--6% for arithmetic accuracy. We show speedups of 340× and 90× in time for the test cases compared to brute-force enumeration. We also identify the optimal set of parameters for a number of scenarios (e.g., minimizing power under arithmetic inaccuracy bounds). |
| تدمد: | 1936-7414 1936-7406 |
| URL الوصول: | https://explore.openaire.eu/search/publication?articleId=doi_________::9ebe38577bb9877448f58f95083deb4b https://doi.org/10.1145/2567661 |
| حقوق: | CLOSED |
| رقم الأكسشن: | edsair.doi...........9ebe38577bb9877448f58f95083deb4b |
| قاعدة البيانات: | OpenAIRE |
| تدمد: | 19367414 19367406 |
|---|