Content Addressable Memory (CAM) is a fast searching device which takes data as input and gives the address of that data. CAM's are widely used in routers for packet forwarding. In simple words, CAM can be considered as a black box which takes data as input and gives the address of the data as output. The main challenge is to obtain full swing output voltage when CAM is connected in an array. In this research work, an effort is made to design Full swing output 8x8 Content Addressable Memory (CAM) using XOR logic which has an advantage of not requiring any pre-charge like NOR and NAND logic. To test the design completely an 8x8 Static Random-Access Memory (SRAM) array is also designed. To access memory block easily few additional blocks like decoder, mux, encoders are also designed. Full swing output is achieved using GDI logic where ever there is a significant voltage level drop in the whole circuit. The proposed system is designed using gpdk180 in Cadence. The functionality of the design verified using Cadence Virtuoso tool. The circuit has an average power of 825uW with a delay of 20ns.
