The "trap pumping" technique has seen considerable use over recent years as a means to probe the intrinsic properties of silicon defects that can impact charge transfer performance within CCD-based technologies. While the theory behind the technique is reasonably well understood, it has to date only been applied to relatively simple pixel designs where the motion of charge between pixel phases is fairly easy to predict. For some devices, the intrinsic pixel architecture is more complex and can consist of unequal phase sizes and additional implants that deform the electronic potential. Here, we present the implementation of the trap pumping technique for the CCD201-20, a 2-phase Teledyne e2v EMCCD. Clocking schemes are presented that can provide the location of silicon defects to sub-micron resolution. Experimental techniques that allow determination of trap energy levels and emission cross sections are presented. These are then implemented on an irradiated CCD201-20 to determine the energy level and emission cross section for defects thought to be the double acceptor state of the silicon divacancy (VV--) and carbon-phosphorus (CiPs) pairs. An improvement in charge transfer performance through optimised parallel clock delay is demonstrated and found to correlate with the properties of defects found using the trap pumping technique.
