LNA circuit design counting the interconnect line parasitics

التفاصيل البيبلوغرافية
العنوان: LNA circuit design counting the interconnect line parasitics
المؤلفون: Bernard Jarry, Rachid Hamani, Mien Lintignat, Cristian Andrei
المساهمون: Systèmes RF (XLIM-SRF), XLIM (XLIM), Université de Limoges (UNILIM)-Centre National de la Recherche Scientifique (CNRS)-Université de Limoges (UNILIM)-Centre National de la Recherche Scientifique (CNRS), NXP Semiconductors
المصدر: ICECS
Electronics, Circuits and Systems (ICECS), 2014 21st IEEE International Conference on
Electronics, Circuits and Systems (ICECS), 2014 21st IEEE International Conference on, 2014, Unknown, Unknown Region. pp.351-354, ⟨10.1109/ICECS.2014.7049994⟩
بيانات النشر: IEEE, 2014.
سنة النشر: 2014
مصطلحات موضوعية: Integrated circuit interconnections, Engineering, Circuit design, output impedance, Impedance matching, 02 engineering and technology, Integrated circuit design, low noise amplifiers, BiCMOS, Transistors, Noise figure, frequency 24 GHz, Low noise amplifier, integrated circuit design, NXP semiconductors, Microwave band, Frequency measurement, Hardware_INTEGRATEDCIRCUITS, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, Inductors, Output impedance, S-parameters, size 0.25 mum, ComputingMilieux_MISCELLANEOUS, amplifier circuit demonstrator, Semiconductor device measurement, business.industry, Amplifier, matching networks, 020208 electrical & electronic engineering, Electrical engineering, BiCMOS analogue integrated circuits, 020206 networking & telecommunications, Low-noise amplifier, performance evaluation, [SPI.TRON]Engineering Sciences [physics]/Electronics, LNA circuit design, interconnect line parasitics, Integrated circuit modeling, bipolar MMIC, circuit simulation, Octagonal inductors, input impedance, BiCMOS mature technology, business, schematic circuit simulations, Interconnect lines
الوصف: This paper, presents a 24GHz Amplifier circuit demonstrator designed and fabricated in 0.25μm BiCMOS mature technology from NXP Semiconductors in order to evaluate the effect of the interconnect lines on impedance matching. It features 11 dB of gain, 7.6 dB of noise figure (NF) at the working frequency. The input/output impedances are matched close to 50 Ohm with an input return loss of-12 dB and output return loss of about −13 dB. The matching methodology is improved by considering the interconnect lines (from the Layout view) in the matching networks. Schematic circuit simulations and measurements are used to evaluate the amplifier circuit performances. The results are presented here and show a good agreement between both, measurements and simulations.
URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d4583095bcf9ca657bcbca1bd42590bc
https://doi.org/10.1109/icecs.2014.7049994
رقم الأكسشن: edsair.doi.dedup.....d4583095bcf9ca657bcbca1bd42590bc
قاعدة البيانات: OpenAIRE