تقرير
VWSIM: A Circuit Simulator
| العنوان: | VWSIM: A Circuit Simulator |
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| المؤلفون: | Hunt Jr., Warren A., Ramanathan, Vivek, Moore, J Strother |
| المصدر: | EPTCS 359, 2022, pp. 61-75 |
| سنة النشر: | 2022 |
| المجموعة: | Computer Science |
| مصطلحات موضوعية: | Computer Science - Logic in Computer Science, Computer Science - Mathematical Software, Computer Science - Symbolic Computation, B.1.2, B.7.2, D.1.1, D.2.4, F.3.1, F.4.1, G.1.3, I.1.3, I.2.3, I.6.4, J.2 |
| الوصف: | VWSIM is a circuit simulator for rapid, single-flux, quantum (RSFQ) circuits. The simulator is designed to model and simulate primitive-circuit devices such as capacitors, inductors, Josephson Junctions, and can be extended to simulate other circuit families, such as CMOS. Circuit models can be provided in the native VWSIM netlist format or as SPICE-compatible netlists, which are flattened and transformed into symbolic equations that can be manipulated and simulated. Written in the ACL2 logic, VWSIM provides logical guarantees about each of the circuit models it simulates. Note, our matrix solving and evaluation routines use Common Lisp floating-point numbers, and work is ongoing to admit these models into ACL2. We currently use VWSIM to help us design self-timed, RSFQ-based circuits. Our eventual goal is to prove properties of RSFQ circuit models. The ACL2-based definition of the VWSIM simulator offers a path for specifying and verifying RSFQ circuit models. Comment: In Proceedings ACL2 2022, arXiv:2205.11103 |
| نوع الوثيقة: | Working Paper |
| DOI: | 10.4204/EPTCS.359.7 |
| URL الوصول: | http://arxiv.org/abs/2205.11698 |
| رقم الأكسشن: | edsarx.2205.11698 |
| قاعدة البيانات: | arXiv |
| DOI: | 10.4204/EPTCS.359.7 |
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