تقرير
CircuitVAE: Efficient and Scalable Latent Circuit Optimization
| العنوان: | CircuitVAE: Efficient and Scalable Latent Circuit Optimization |
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| المؤلفون: | Song, Jialin, Swope, Aidan, Kirby, Robert, Roy, Rajarshi, Godil, Saad, Raiman, Jonathan, Catanzaro, Bryan |
| سنة النشر: | 2024 |
| المجموعة: | Computer Science |
| مصطلحات موضوعية: | Computer Science - Machine Learning, Computer Science - Hardware Architecture |
| الوصف: | Automatically designing fast and space-efficient digital circuits is challenging because circuits are discrete, must exactly implement the desired logic, and are costly to simulate. We address these challenges with CircuitVAE, a search algorithm that embeds computation graphs in a continuous space and optimizes a learned surrogate of physical simulation by gradient descent. By carefully controlling overfitting of the simulation surrogate and ensuring diverse exploration, our algorithm is highly sample-efficient, yet gracefully scales to large problem instances and high sample budgets. We test CircuitVAE by designing binary adders across a large range of sizes, IO timing constraints, and sample budgets. Our method excels at designing large circuits, where other algorithms struggle: compared to reinforcement learning and genetic algorithms, CircuitVAE typically finds 64-bit adders which are smaller and faster using less than half the sample budget. We also find CircuitVAE can design state-of-the-art adders in a real-world chip, demonstrating that our method can outperform commercial tools in a realistic setting. Comment: Design Automation Conference (DAC) 2024; the first two authors contributed equally |
| نوع الوثيقة: | Working Paper |
| DOI: | 10.1145/3649329.3656543 |
| URL الوصول: | http://arxiv.org/abs/2406.09535 |
| رقم الأكسشن: | edsarx.2406.09535 |
| قاعدة البيانات: | arXiv |
| DOI: | 10.1145/3649329.3656543 |
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