دورية أكاديمية

IEEE 1451.0-2007 Compatible Smart Sensor Readout with Error Compensation Using FPGA

التفاصيل البيبلوغرافية
العنوان: IEEE 1451.0-2007 Compatible Smart Sensor Readout with Error Compensation Using FPGA
المؤلفون: J. Kamala, B. Umamaheswari
المصدر: Sensors & Transducers, Vol 102, Iss 3, Pp 10-21 (2009)
بيانات النشر: IFSA Publishing, S.L., 2009.
سنة النشر: 2009
المجموعة: LCC:Technology (General)
مصطلحات موضوعية: Estimator, FPGA, Synthesis, Transducer interface model, Transducer electronic data sheet, Technology (General), T1-995
الوصف: This paper deals with effective usage of user TEDS for developing smart sensor readout which is suitable to estimate and compensate the disturbances occurring in the system. The system parameters are incorporated along with other transducer data. Appropriate processing capabilities are built in Transducer Interface Module TIM for disturbance estimation and compensation. A Verilog based single chip module of IEEE 1451.0 smart sensor is proposed incorporating the above mentioned features. The architecture enables reliable and smart readout for sensors at low cost for a given application. The programmable nature of the proposed architecture enables wide usage of the smart sensor for various applications.
نوع الوثيقة: article
وصف الملف: electronic resource
اللغة: English
تدمد: 2306-8515
1726-5479
Relation: http://www.sensorsportal.com/HTML/DIGEST/march_09/P_397.pdf; https://doaj.org/toc/2306-8515; https://doaj.org/toc/1726-5479
URL الوصول: https://doaj.org/article/7a54510f9d244455aedb411bcf417bae
رقم الأكسشن: edsdoj.7a54510f9d244455aedb411bcf417bae
قاعدة البيانات: Directory of Open Access Journals