دورية أكاديمية
Design of DNN-Based Low-Power VLSI Architecture to Classify Atrial Fibrillation for Wearable Devices
| العنوان: | Design of DNN-Based Low-Power VLSI Architecture to Classify Atrial Fibrillation for Wearable Devices |
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| المؤلفون: | Parmar, R., Janveja, M., Pidanic, J., Trivedi, G. |
| المصدر: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems IEEE Trans. VLSI Syst. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on. 31(3):320-330 Mar, 2023 |
| قاعدة البيانات: | IEEE Xplore Digital Library |
Full Text Finder | تدمد: | 10638210 15579999 |
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| DOI: | 10.1109/TVLSI.2023.3236530 |