Novel Cell Architectures with Back-side Transistor Contacts for Scaling and Performance

التفاصيل البيبلوغرافية
العنوان: Novel Cell Architectures with Back-side Transistor Contacts for Scaling and Performance
المؤلفون: Kobrinsky, M., Silva, J. D, Mannebach, E., Mills, S., Qader, M. Abd El, Adebayo, O., Radhakrishna, N. Arkali, Beasley, M., Chawla, J., Chugh, S., Dasgupta, A., Desai, U., Re, E. De, Dewey, G., Edwards, T., Engel, C., Gudmundsson, V., Hicks, J., Krist, B., Mehandru, R., Meric, I., Morrow, P., Nandi, D., Patel, P., Ramamurthy, R., Samanta, D., Shoer, L., Amour, A. St, Tan, L. H., Yemenicioglu, S., Wang, X., Ghani, T.
المصدر: 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) VLSI Technology and Circuits (VLSI Technology and Circuits), 2023 IEEE Symposium on. :1-2 Jun, 2023
Relation: 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:9784863488069
تدمد:21589682
DOI:10.23919/VLSITechnologyandCir57934.2023.10185319