A new staggered virtual ground array architecture implemented in a 4Mb CMOS EPROM

التفاصيل البيبلوغرافية
العنوان: A new staggered virtual ground array architecture implemented in a 4Mb CMOS EPROM
المؤلفون: All, S., Nguyen, D., Sani, B., Shubat, A., Hu, C., Me, Y., Kazarounian, R., Eltan, B.
المصدر: Symposium 1989 on VLSI Circuits VLSI Circuits, 1989. Digest of Technical Papers., 1989 Symposium on. :35-36 1989
Relation: Symposium 1989 on VLSI Circuits
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
DOI:10.1109/VLSIC.1989.1037477