15.3 A 3nm FinFET 4.3GHz 21.1Mb/mm2 Double-Pumping 1-Read and 1-Write Pseudo-2-Port SRAM with Folded-Bitline Multi-Bank Architecture

التفاصيل البيبلوغرافية
العنوان:	15.3 A 3nm FinFET 4.3GHz 21.1Mb/mm2 Double-Pumping 1-Read and 1-Write Pseudo-2-Port SRAM with Folded-Bitline Multi-Bank Architecture
المؤلفون:	Haraguchi, Masaru, Fujino, Yorinobu, Yokoyama, Yoshisato, Chang, Ming-Hung, Hsu, Yu-Hao, Cheng, Hong-Chen, Nii, Koji, Wang, Yih, Chang, Tsung-Yung Jonathan
المصدر:	2024 IEEE International Solid-State Circuits Conference (ISSCC) Solid-State Circuits Conference (ISSCC), 2024 IEEE International. 67:280-282 Feb, 2024
Relation:	2024 IEEE International Solid-State Circuits Conference (ISSCC)
قاعدة البيانات:	IEEE Xplore Digital Library