التفاصيل البيبلوغرافية
| العنوان: |
Virtual FAB Semiconductor Process Modeling Augmented Vertical Gate All Around Complementary FET Based 6T SRAM Path-Finding |
| المؤلفون: |
Di, Zhaohai, Luo, Yanna, Xu, Haoqing, He, Hao, Yin, Huaxiang, Wu, Zhenhua |
| المصدر: |
2024 Conference of Science and Technology for Integrated Circuits (CSTIC) Science and Technology for Integrated Circuits (CSTIC), 2024 Conference of. :1-3 Mar, 2024 |
| Relation: |
2024 Conference of Science and Technology for Integrated Circuits (CSTIC) |
| قاعدة البيانات: |
IEEE Xplore Digital Library |
