دورية أكاديمية
Design Technology Co-Optimization for Gate-All-Around Nanosheet Transistors Considering Source/Drain Confinement and Post- Gate Single Diffusion Break
| العنوان: | Design Technology Co-Optimization for Gate-All-Around Nanosheet Transistors Considering Source/Drain Confinement and Post- Gate Single Diffusion Break |
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| المؤلفون: | Wang, D., Liu, T., Sun, X., Huang, Z., Qian, L., Guo, X., Wang, L., Xu, M., Wei Zhang, D. |
| المصدر: | IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 71(7):4021-4027 Jul, 2024 |
| قاعدة البيانات: | IEEE Xplore Digital Library |
Full Text Finder | تدمد: | 00189383 15579646 |
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| DOI: | 10.1109/TED.2024.3403794 |