Design and Analysis of a Family of pW-Level Sub-1V CMOS VRGs by Stacking a Current-Source Transistor and a Resistive-Load Transistor

التفاصيل البيبلوغرافية
العنوان:	Design and Analysis of a Family of pW-Level Sub-1V CMOS VRGs by Stacking a Current-Source Transistor and a Resistive-Load Transistor
المؤلفون:	Zhang, Tong, Zhang, Dingguo, Jin, Jing, Mercier, Patrick P., Wang, Hui
المصدر:	2024 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and Systems (ISCAS), 2024 IEEE International Symposium on. :1-5 May, 2024
Relation:	2024 IEEE International Symposium on Circuits and Systems (ISCAS)
قاعدة البيانات:	IEEE Xplore Digital Library